Dfm/Dft Engineer - Seberang Perai
Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Microelectronics, or related field.
Strong understanding of VLSI design flow, especially backend (physical) design and verification stages.
Candidates with strong Korean language proficiency.
Familiarity with CMOS process technology, foundry rules, and fabrication constraints.
Scripting skills: Proficiency in TCL, Perl, Python, Shell for automation and tool development.
Ability to debug complex issues across design, tools, and silicon.
Experience in ASIC or SoC projects from design to tape-out is a strong plus.
Knowledge of low-power design techniques and how they impact DFT/DFM is an added advantage.
Responsibilities:
Integration of Manufacturing Rules:
Ensure that IC designs follow manufacturing process guidelines such as metal width/spacing, via rules, electromigration (EM), IR drop, and more.
Perform physical verification using tools like Calibre DRC/LVS/ERC, RedHawk, etc.
Yield Analysis and Optimization:
Analyze yield issues and identify design factors that may affect manufacturability.
Recommend design changes to improve wafer yield and minimize costly re-spins.
Collaboration with Foundries:
Apply foundry feedback to design flow and rule decks.
DFM Check Automation:
Use or develop automated scripts and tools for DFM checks like lithography simulation, CMP analysis, dummy fill, etc.
Support Physical Design Teams:
Provide guidance during floorplanning, placement, and routing to enhance manufacturability and reliability.- Inclusive benefits: EPF, SOCSO, Medical & Annual Leave.